Nanyang Singtech – Digital IC Design Engineer

Job responsibilities

1. Core RTL development: Use Verilog HDL to design, implement and optimize digital circuits at the module or subsystem level, and write high-quality, integrable RTL code.

2. Chip front-end process: Participate in the complete IC design front-end process, including architecture exploration, logic synthesis, formal verification, static timing analysis (STA), and low-power design.

3. Design validation collaboration: Work closely with the validation team to understand the validation plan, assist with debugging, and ensure that the design functions and performance are met.

4. Technical documentation: Write clear design specifications, implementation plans, and review documents.

Requirements for appointment

[Requirements for Experienced Engineers (1 + Experience)]

1. Required skills:

O Master's or Bachelor's degree in Microelectronics / Electronic Engineering / Mechanical Engineering.

O Proficient in Verilog / VHDL, solid knowledge in digital IC design and RTL coding, and successful experience in module level delivery to wafers.

O Familiar with ASIC / SoC front-end design process and tools (e.g. Synopsys / Cadence series).

2. Priority conditions:

o Experience in any of the following areas: CPU/GPU microarchitecture, high-speed interfaces (PCIe, DDR), AI accelerators, network processing.

O Familiar with AMBA and other on-chip bus protocols and Python / Tcl.

[Requirements for current students / interns]

1. Educational Background: We warmly welcome applications from outstanding current students (undergraduate or master's) or recent graduates from top universities around the world. Students with backgrounds in microelectronics, electrical engineering or computer science from Nanyang Technological University, the National University of Singapore or equivalent institutions are particularly encouraged to submit their resumes.

2. Core potential:

O Passion for chip design and solid foundation in digital circuit theory.

O Proficient in Verilog hardware description language and practical experience in RTL design in course projects or research.

O Understand the basic digital design process (e.g. logic synthesis, simulation verification).

3. Projects and capabilities:

Outstanding performance in FPGA projects, digital design competitions or related research projects is preferred.

O Excellent learning, analytical and problem-solving skills.

O Good command of both Chinese and English and team work spirit.

Why join us?

· Deep into the core, defining the future: Get directly involved in cutting-edge chip design projects, and your code will be translated directly into world-changing silicon wafers.

· Excellent mentors and team: Work with senior experts from industry leading companies to gain valuable career guidance and rapid growth.

· Competitive compensation and benefits:

O Offering competitive salaries in the Singapore market.

O Generous annual learning and development allowance to support your participation in conferences, training and further studies.

· Connections to top academic networks: We attach great importance to connections with top local universities (such as NTU, NUS), providing excellent students with a perfect connection from campus to the workplace.

How to apply

If you are an experienced design expert, or from NTU, NUS and other universities, eager to create a career in the field of chip design, we invite you to join us!